Verilog engineer job offers
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Staff Silicon Design Engineer – RTL
Advanced Micro Devices
...Verilog/VHDL language, verification, logic synthesis, and DFT in high performance design. Experience in test planning/creation/analysis of post silicon...
30+ days ago in Talent.comReport -
Sr. Silicon Design Engineer (FPGA)
Advanced Micro Devices
...Verilog Strong debug skills Scripting experience using Perl, Python, TCL, C-shell, Make and/or other scripting languages Knowledge and experience with basic...
21 days ago in Talent.comReport -
(Sr. /Staff) ISP RTL Design Engineer
OMNIVISION
Description Responsibilities: Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define...
30+ days ago in Talent.comReport -
Senior Engineer
jondavidson D1, Singapore, Singapore
...Verilog Assertions (SVA) C/C+ languageFormal Methodology (e. G JasperGOLD) Coverage analysisLow-power verificationScripting languages (e. G tcl, shell, perl...
6 days ago in WhatjobsReport -
FPGA Engineer
Grasshopper Singapore, Singapore
...by firm values of curiosity, empowerment and flexibility. About the Role: As we continue to grow, Grasshopper seeks a highly motivated FPGA Engineer...
7 days ago in JobrapidoReport -
[2026 Campus] Engineer / Senior Engineer (Design...
MediaTek
...coverage driven verification methodology. Implement functional and functional/code coverage closure. Hands-on code/debug with UVM, System Verilog...
30+ days ago in Talent.comReport -
HIG HBM Senior PE Component Validation Engineer
Micron
...Verilog, UVM, version control systems (git, svn) Excellent problem-solving and analytical skills Works well in a team environment Good communication, data...
30+ days ago in Talent.comReport -
HIG HBM PE Senior Component Validation Engineer
Micron
...Verilog, UVM, version control systems (git, svn) Excellent problem-solving and analytical skills Works well in a team environment Good communication, data...
20 days ago in Talent.comReport -
HIG HBM PE Principal Component Validation Engineer
Micron
...Verilog, UVM, version control systems (git, svn) Excellent problem-solving and analytical skills Works well in a team environment Good communication, data...
30+ days ago in Talent.comReport -
Senior Engineer
jondavidson D1, Singapore, Singapore
...Verilog (SV) C/C+ languageFormal Methodology (e. G JasperGOLD) Coverage analysisLow-power verification. Scripting languages (e.g perl, tcl, python) Able to...
6 days ago in WhatjobsReport -
Integrated Circuit Design Engineer
Wibit Consulting & Services (WibitCS) Singapore, Singapore
...#RTLDesign #Verilog #SystemVerilog #EDA #ChipDesign #AutomotiveTech #AIChips #SemiconductorJobs #EngineeringCareers #SingaporeJobs #TechHiring #J-18808-Ljbffr
3 days ago in JobrapidoReport -
Senior Product Development Engineer (Firmware development...
Advanced Micro Devices
...perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are seeking a highly skilled Senior Engineer...
30+ days ago in Talent.comReport -
Engineer, HIG-HBM Product Engineering (Media Health...
Micron
...Verilog simulations. This technical support is crucial for the development of new products and technologies. Yield Improvement and Cost Reduction: The role...
30+ days ago in Talent.comReport -
Engineer, Product Engineering (Media Health Manufacturing...
Micron
...Verilog simulations. This technical support is crucial for the development of new products and technologies. Yield Improvement and Cost Reduction: The role...
30+ days ago in Talent.comReport -
Snr Manager - HIG HBM - PE Design Validation
Micron
...Apart: Coursework in VLSI, semiconductor process, Python and C/C+ Experience with either: Verilog, VHDL, or System Verilog Having an innovative approach that
12 days ago in Talent.comReport -
Senior Engineer
jondavidson D1, Singapore, Singapore
...Verilog (SV) C/C+ languageFormal Methodology (e. G JasperGOLD) Coverage analysisLow-power verification. Scripting languages (e.g perl, tcl, python) Able to...
6 days ago in WhatjobsReport -
Logic Design Engineer
Confidential Singapore, Singapore
...Verilog or SystemVerilog, and skilled in using scripting languages such as C, Tcl, Shell, Perl, or Python; 3. Familiar with SDC constraint writing and...
5 days ago in MonsterReport -
Senior Engineer
jondavidson D1, Singapore, Singapore
...Verilog Assertions (SVA) C/C+ languageFormal Methodology (e. G JasperGOLD) Coverage analysisLow-power verification. Scripting languages (e.g perl, tcl...
6 days ago in WhatjobsReport -
Research Engineer
National University of Singapore Singapore, Singapore
...School, NUS is the oldest higher education institution in SingaporeJob description: Job DescriptionWe are seeking a dedicated and skilled Electronics Engineer...
6 days ago in WhatjobsReport -
FPGA Engineer
Grasshopper D1, Singapore, Singapore
...by firm values of curiosity, empowerment and flexibility. About the Role: As we continue to grow, Grasshopper seeks a highly motivated FPGA Engineer...
5 days ago in WhatjobsReport -
Logic Design Engineer
BITMAIN Singapore, Singapore
...Verilog or SystemVerilog, and skilled in using scripting languages such as C, Tcl, Shell, Perl, or Python; 3. Familiar with SDC constraint writing and...
6 days ago in JobrapidoReport -
ISP RTL Design Engineer
Omnivision D1, Singapore, Singapore
DescriptionResponsibilities: Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP...
6 days ago in WhatjobsReport -
Senior Physical Design Engineer
new ADVANCED MICRO DEVICES (SINGAPORE) Singapore, Singapore
...Verilog, C, and C+. Automating workflows in a distributed computational environment. Good understanding and hands-on experience in timing constraints...
1 day ago in JobleadsReport -
NPU Design Engineer
OmniVision Technologies D1, Singapore, Singapore
...Being part of modelling the performance of the NPU module and its data transaction throughput. Microarchitecture design and RTL coding using Verilog...
6 days ago in WhatjobsReport -
SoC Design Engineer
Omnivision D1, Singapore, Singapore
...to meet or exceed the technical requirements of the SoC. You would be responsible for the successful implementation of the designs in Verilog/SystemVerilog...
6 days ago in WhatjobsReport
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