Verilog engineer job offers
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SoC Design Engineer
OmniVision Technologies D1, Singapore, Singapore
...to meet or exceed the technical requirements of the SoC. You would be responsible for the successful implementation of the designs in Verilog/SystemVerilog...
6 days ago in WhatjobsReport -
Senior ASIC & RTL Design Engineer
Wibit Consulting & Services (WibitCS) Singapore, Singapore
...is seeking an ASIC Designer to join their team in Singapore. This role involves developing micro-architectures, writing RTL code in Verilog/SystemVerilog...
3 days ago in JobrapidoReport -
IP Design Engineer
Omnivision D1, Singapore, Singapore
...accelerators, etc. ResponsibilitiesDevelop design requirements from a given system level specifications. Microarchitecture design and RTL coding using Verilog...
6 days ago in WhatjobsReport -
ASIC RTL Design Engineer
TETRAMEM SINGAPORE PTE. Singapore, Singapore
...Verilog Experience with VCS, Verdi or other industry standard tools Experience with pre-layout simulation and post-layout simulation Understanding of the...
5 days ago in JobleadsReport -
Integrated Circuit Design Engineer
Wibit Consulting & Services (WibitCS) D1, Singapore, Singapore
...#ASIC #RTLDesign #Verilog #SystemVerilog #EDA #ChipDesign #AutomotiveTech #AIChips #SemiconductorJobs #EngineeringCareers #SingaporeJobs #TechHiring
6 days ago in WhatjobsReport -
Senior Design Verification Engineer
jondavidson D1, Singapore, Singapore
...Verilog Assertions (SVA) C/C+ languageFormal Methodology (e. G JasperGOLD) Coverage analysisLow-power verification. Scripting languages (e.g perl, tcl...
6 days ago in WhatjobsReport -
Senior Firmware Engineer
Advanced Energy D1, Singapore, Singapore
...Verilog or VHDL. FPGA measurements and control of devices in VHDL. SPI bus or similar interface knowledge required. Knowledge of revision control, vaults...
6 days ago in WhatjobsReport -
Standard Cell Library Design Engineer
Avago Technologies Singapore, Singapore
...verilog, lef, liberty and other industry standard EDA models Familiarity with EDA tools used in STA and PnR Experience with. Lib syntax including...
6 days ago in JobrapidoReport -
Principal DFT Engineer
Avago Technologies Singapore, Singapore
We are seeking a highly motivated Design-for-Test (DFT) Engineer to join our SoC/ASIC DFT development team. The successful candidate will be responsible for...
6 days ago in JobleadsReport -
Senior / Principal DFT Engineer
Broadcom D3, Singapore, Singapore
...verilog / gate level simulationg) Work closely with cross-functional teams to resolve DFT/testing timing challenges. I) Collaborate with ATE engineers to...
2 days ago in WhatjobsReport -
Semiconductor Design Verification Engineer
Realtek Singapore Private D4, Singapore, Singapore
...Verilog/ UVM experience. Familiar with ASIC verification methodology, tools, and development flow. Working experience or familiar with Ethernet L2/L3...
6 days ago in WhatjobsReport -
FPGA Design Engineer
PERSOL D2, Singapore, Singapore
...experience withFPGA design tools (Vivado, Vitis). Strong proficiency in RTL coding, verification, and validation (VHDL/Verilog/SystemVerilog)...
6 days ago in WhatjobsReport -
IC R&D Engineer
Broadcom D1, Singapore, Singapore
...circuit design from architecture to transistor level, post extraction verification and design modifications to meet requirementsDigital logic design, verilog...
6 days ago in WhatjobsReport -
Sr. Silicon Design Engineer (FPGA)
new Confidential Singapore, Singapore
...Verilog Strong debug skills Scripting experience using Perl, Python, TCL, C-shell, Make and/or other scripting languages Knowledge and experience with basic...
1 day ago in MonsterReport -
Senior FPGA Software Engineer
new Transcelestial Technologies Singapore, Singapore
...VHDL/Verilog Collaborate with external parties to design and develop capabilities for FPGAs that meet Transcelestial’s needs Develop test benches and...
6 h 20 minutes ago in JobleadsReport -
MTS Quality Engineer
Advanced Micro Devices D1, Singapore, Singapore
...C/C+/Verilog/VHDL/ Tcl/Perl/Python/Unix shellsWorking knowledge of Linux environmentPossesses a good understanding of root cause analysis techniquesACADEMIC...
6 days ago in WhatjobsReport -
Senior / Principal DFT Engineer
Broadcom D1, Singapore, Singapore
...Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Position of Senior DFT engineer...
6 days ago in WhatjobsReport -
Staff Silicon Design Engineer
Advanced Micro Devices D1, Singapore, Singapore
...Verilog/SystemVerilog HDLFamiliarity with CAD tools such as VCS, Verdi, Design Compiler, Primetime, Spyglass, Lint, Conformal, CDC/RDC tools, etc...
6 days ago in WhatjobsReport -
Senior Product Development Engineer
Advanced Micro Devices D1, Singapore, Singapore
...perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: We are seeking a highly skilled Senior Engineer...
6 days ago in WhatjobsReport -
DFT Engineer
Confidential Singapore, Singapore
...Verilog and VHDL code. Familiar with IEEE 1149 and 1687. Good understanding of synthesis and static timing principles. Excellent problem solving, debug, and...
21 days ago in MonsterReport -
Senior Hardware Engineer
new Rapsodo Singapore, Singapore
...in logic design for FPGA using VHDL/Verilog is a plus Ability to work in a dynamic environment with good communication and interpersonal skills #J-18808-Ljbffr
6 h 22 minutes ago in JobleadsReport -
Silicon Design Engineer – Digital
Advanced Micro Devices D1, Singapore, Singapore
...we shape the future of AI and beyond. Together, we advance your career. THE ROLE: AMD is seeking a talented, motivated and self-driven digital design engineer...
6 days ago in WhatjobsReport -
Senior Library Characterization Engineer
Bitdeer Technologies Group Singapore, Singapore
...(Verilog/SystemVerilog). Translate characterization and PPA analysis data into improved library usage guidelines and implementation methodologies. How you...
5 days ago in JobleadsReport -
Lead engineer
Uni Connect
...Verilog, C/C+, Python, Perl or MakefileTechnologies: ARM M/RISC. V (Preferred), AMBA AXI/AHB/APS, DMA, Flow Control, Serial Devices, Qo5Preferred...
6 days ago in WhatjobsReport -
RTL Design Engineer
Uni Connect
Understandingdesign specification and performing RTL design of the IP using Verilog/SystemVerilogPerform designverification, formal verification and code...
6 days ago in WhatjobsReport
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