Verilog engineer job offers

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  • 6G Communication System Engineer / Senior / Staff Engineer

    MediaTek Singapore, Singapore

    ...Verilog or VHDL, etc. Is preferred... Strong background in the wireless communication industry, with a proven track record of working on wireless...
    30+ days ago in Talent.com

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  • HIG HBM PE Component Validation Engineer

    Singapore, Singapore

    ...Verilog, UVM, version control systems (git, svn) Excellent problem-solving and analytical skills Works well in a team environment Good communication, data...
    15 days ago in Jobleads

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  • AI Chip Design Engineer (Fresh Graduates Welcome)

    Confidential Singapore, Singapore

    ...memory hierarchy. Experience in programming languages such as Verilog, C/C+. Strong learning capability, good communication and collaboration skills.
    30+ days ago in Monster

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  • Senior/Principal Product Engineer - Functional & Design...

    D19, Singapore, Singapore

    ...sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. JR67933 Senior/Principal Product Engineer...
    30+ days ago in Jobleads

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  • AG59- Senior Product Development Engineer (Soc | FPGA |...

    Confidential D2, Singapore, Singapore

    Senior Product Development Engineer 5 days 9am-6pm East Interested applicants can also send your resume to WA: +65 8839 3--- (Ms Angel) and allow our...
    30+ days ago in Monster

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  • Senior Product Development Engineer [Experience in SoC...

    Confidential Singapore, Singapore

    Senior Product Development Engineer 5 days 9am-6pm No salary budget, depend on experience Working location will be discussed during interview (either one...
    30+ days ago in Monster

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  • Senior Product Development Engineer [Experience in SoC...

    Confidential Singapore, Singapore

    Senior Product Development Engineer 5 days 9am-6pm No salary budget, depend on experience Working location will be discussed during interview (either one...
    24 days ago in Foundit

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  • Staff Analog/Mixed-Signal Verification Engineer - RF/TIA

    Singapore, Singapore

    ...programs or scripts in Python, Verilog/Verilog-A is a plus. Excellent debugging, problem-solving and analytical skills. Strong communication, presentation,
    22 days ago in Jobleads

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  • Staff Analog/Mixed-Signal Verification Engineer - RF/TIA

    Confidential Singapore, Singapore

    ...programs or scripts in Python, Verilog/Verilog-A is a plus. Excellent debugging, problem-solving and analytical skills Strong communication, presentation, and
    21 days ago in Monster

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  • Engineer/Senior Engineer, NVEG PE (FDV-RSG/Infrastructure)

    Singapore, Singapore

    ...know-how (e.g. Verilog, Synopsis VCS) is a plus. Effective communication skills in written and spoken English. Good multitasking and organizational skills.
    10 days ago in Jobleads

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  • Product Engineer - NAND Silicon Design Validation (SDV)

    D19, Singapore, Singapore

    ...to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. JR60696 Product Engineer...
    30+ days ago in Jobleads

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  • Principal / Senior /Product Engineer (Sustaining NAND...

    D19, Singapore, Singapore

    ...sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. JR68881 Principal / Senior Product Engineer...
    30+ days ago in Jobleads

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  • ASIC design manager

    Confidential Singapore, Singapore

    ...EDA tools for Simulation, Synthesis, Timing (STA), Formal and Assertion based verification, etc. Familiar with design and programming languages: Verilog...
    24 days ago in Foundit

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  • HIG HBM PE Principal Component Validation Engineer

    Singapore, Singapore

    ...and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As an HBM PE Principal Component Validation Engineer...
    15 days ago in Jobleads

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  • HIG HBM PE Senior Component Validation Engineer

    Singapore, Singapore

    ...possible. We do it all while committing to integrity, sustainability, and giving back to our communities. As an HBM PE Senior Component Validation Engineer...
    15 days ago in Jobleads

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  • Senior/ Staff. ASIC Digital Design Engineer (NPU/ RTL...

    Singapore, Singapore

    We are looking for a highly experienced Senior/Staff ASIC Digital Design Engineer specializing in NPU and RTL coding. The ideal candidate will have extensive...
    14 days ago in Jobleads

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  • Snr manager - hig hbm - pe design validation

    Singapore, Singapore

    ...Apart: Coursework in VLSI, semiconductor process, Python and C/C+ Experience with either: Verilog, VHDL, or System Verilog Having an innovative approach that
    15 days ago in Jobleads

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